They Built a Chip That Beats Nvidia. Almost Nobody Switched.
Latest version only



Latest version only



Semiconductores y hardware23 sept 2026
If this company vanished tomorrow, how long until someone else could do its job? Sort the AI industry by that one question and profit lines up with the answer.
Semiconductores y hardware23 sept 2026
The fastest chips ever built spend much of their time waiting for data. That one fact turned memory from a commodity into an execution race between three companies.
Semiconductores y hardware23 sept 2026
EUV lithography has no second supplier, not even a weaker one. ASML didn't beat its rivals. They read the same research and decided it wasn't worth it.
The new chip on the left. The one doing the work on the right.
Several companies have built accelerators that beat Nvidia at a specific job. Measurably. Repeatedly. Verified by outside benchmarking services.
It has barely moved the market. That's not a conspiracy, and it isn't stupidity on the part of buyers. It's the most useful lesson in the whole industry, and once you understand it you can stop being impressed by benchmark charts forever.
The customer is buying a working industrial system: processors, memory sitting next to them, a proprietary interconnect that makes dozens of chips behave as one machine, networking that joins racks into clusters, software that turns a model into efficient instructions, racks that deliver power and cooling, a supply chain that can actually deliver all of it in volume, and availability in every major cloud with engineers who already know how to run it.
Swap out the processor and you have to redo an unknown fraction of that. Software gets rewritten or retuned. Model outputs get re-validated to confirm quality didn't shift. Engineers learn new tools. Someone signs off on the operational risk.
The chip is wired into everything around it. The faster one in the hand is wired into nothing.
So the real question is never "is this chip faster." It's "is it faster by more than the cost of switching."
This distinction matters more than any spec:
And "10x" has to describe the whole useful result, not one convenient number in one column.
The moat isn't magic. It's a threshold that a challenger has to clear, and it is clearable — which is exactly why buyers have started clearing it in specific, limited places.
A small edge hits the wall and drops back. Only a big enough one clears it.
Put the two flagship parts side by side and the answer flips row by row. Memory capacity: the challenger wins decisively. Memory bandwidth: close enough to argue about. Four-bit compute: the incumbent. Eight-bit compute: the challenger.
So "how much better is it" has no single answer. It depends which row you quote, and which numerical format you quote it in.
There's a better number nobody advertises. Ahead of one launch, a vice president at the challenger told press that in real-world testing their part reached exactly half of its own headline peak figure. That is normal. It's normal for everybody, including the market leader. Peak tells you how high the ceiling is. It tells you nothing about whether you can touch it — and how close you get is decided by software, not silicon.
Read the deals carefully and a different story appears. One hyperscaler committed to gigawatts of the challenger's accelerators, rented a rival's custom chips, and separately committed to millions of the market leader's GPUs — all within a few months. A major AI lab runs workloads on the leader, on one cloud's custom silicon, on another cloud's custom silicon, and now on the challenger too.
Those are not migrations. They're portfolios.
Not a migration. One basket per supplier.
The largest buyers on Earth concluded that depending on a single supplier for the most strategically important input in their industry is itself a risk, and they are willing to absorb real engineering cost to fix it. Being the credible second source is a valuable position even when you never become first.
The interesting attempts didn't try to build a slightly better GPU.
One refused to cut up the wafer. Chips are normally printed one exposure at a time — there's a maximum size to each exposure, and you can't normally draw a wire crossing from one exposure into the next. That's why chips have a maximum size. Working with the foundry, this company developed a way to stitch wiring across those boundaries, so an entire wafer becomes one processor.
Why bother? Because of what happens when a signal leaves a piece of silicon. On-chip wires are nanometres apart and cost almost nothing to drive. Getting off the package means pads, bumps, boards — structures that are gigantic by comparison, burn far more energy per bit, and, crucially, you can only fit a tiny fraction as many of them. Millions of connections inside the silicon become thousands leaving it. Engineers call it the beachfront problem: your ability to move data is limited by the edge, and the edge doesn't grow when you add more compute inside.
What they bought: extraordinary on-wafer bandwidth and the fastest response to a single user anyone has independently measured. What they gave up: memory capacity — tens of gigabytes across an entire wafer, against hundreds sitting beside one conventional GPU. They didn't delete the boundary. They bought a very large island.
The other deleted external memory entirely. Weights live permanently in on-chip SRAM. No DRAM means no rows to open, no refresh pauses, no queueing behind other requests — so every memory access takes the same, knowable number of cycles.
That predictability unlocks the real trick. If timing is exact, the compiler can schedule the entire program before the chip powers on, cycle by cycle. And once every decision is already made, the hardware that exists to make decisions at runtime — the scheduler watching what's ready this instant — has nothing to do. So they deleted it and spent that silicon on arithmetic instead.
A busy intersection needs lights, sensors and a controller reacting to whatever shows up. A railway needs none of that, because the timetable was written in advance.
The bill: half a gigabyte per chip. A mid-size model needs over a hundred of them arranged in a pipeline. Cheap chip times a hundred is not a cheap machine, and it only pays if requests keep arriving to keep the pipeline full. A half-empty rack is very expensive indeed.
Not with either of them beating the incumbent.
The market leader paid roughly $20 billion for the deterministic-inference company's assets, technology licence and engineering team — the largest transaction in its history — and three months later announced a rack that pairs its own GPUs with those chips: GPUs handle reading the prompt, the acquired design handles generating tokens. Eight months after that, the main challenger acquired the most extreme specialist of the lot, planning to fold it in alongside its own GPUs.
Neither specialist replaced anyone. Both became features of the platform they were built to displace.
A better architecture is the beginning of the work, not the end. The design still has to be fabricated, tested and corrected. Drivers, compilers and libraries have to mature. Servers get built. Memory and packaging capacity must be reserved years ahead. Customers test, retune, and decide whether they trust it in production.
Only after surviving all of that does a clever chip become a business — and while it's happening, the incumbent ships another generation and changes the comparison.
So the useful question isn't "which chip is fastest." It's which workloads have become predictable enough that specialisation is worth the switch — because that's the only place a specialist ever wins, and the moment one does, the platform buys it and installs it as a component.
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