Huawei unveils new chip design law to reach 1.4nm by 2031

Huawei Technologies announced the Tau Scaling Law to improve chip performance by reducing signal latency rather than shrinking transistors. The company aims to reach 1.4-nanometre equivalent density by 2031 and will debut its LogicFolding architecture in Kirin chips later this year.

Xurve View
洞察:

Huawei will produce semiconductors with 1.4-nanometre transistor density by 2031 to bypass trade restrictions. The target aims to close the gap between domestic 7-nm capabilities and the global frontier. Achieving this goal would provide China with a self-sufficient alternative to Western AI hardware.

### Shifting from Moore’s Law to Tau Scaling Huawei unveiled a new design principle on Monday morning called the Tau Scaling Law. The strategy moves away from traditional transistor shrinking, which has hit physical limits as components reach atomic scales. Instead, the company is focusing on reducing signal travel time and data movement latency within computing systems.

IUX24

IUX24 提供深度財經、經濟與投資資訊,借助 AI 挖掘全球市場中最重要的訊號。

IFZA Properties, Dubai Silicon Oasis, DSO-IFZA, Dubai, United Arab Emirates

Copyright IUX24 MEDIA - FZCO. 版權所有。

由 AI 驅動 • 精益求精

IUX24 是一個資訊與分析平台,提供新聞、市場資料、分析工具及 AI 驅動的功能,僅供資訊參考與教育用途。所提供的服務和資訊不構成投資建議、交易訊號或經紀服務。投資涉及風險,使用者在做出投資決定前應審慎評估相關資訊。